1. Field of the Invention
This invention relates to the design and use of a peak detection circuit for use at extremely high data rates, e.g., at OC48 (2.5 Gb/s) and OC192 (10 Gb/s) data rates.
2. Background of Related Art
It is often desired to measure the input signal level in a system. However, direct measurement of an input signal becomes difficult in a system receiving a signal having an extremely high data rate, such as those referred to as OC48 data rates (approximately 2.5 Gigabits per second (2.5 Gb/s) and OC192 data rates (9.9582 Gb/s, or approximately 10 Gb/s). This is because sensitivity of the input line, particularly to added parasitics, may otherwise cause difficulty in detection of the underlying signal. This reduced sensitivity which results from the added parasitics is a deleterious effect because of a more difficult impedance matching problem that needs to be overcome. This problem is minimized by generating the bias voltages for both the input of the peak detector circuit and the input of the 1st amplifier stage simultaneously. This circuitry used to generate this voltage is therefore minimal in component count and as a result reduces the amount of parasitics attached to the critical input nodes.
Conventionally, to measure the input signal level of such high data rate systems, the input signal is measured after a first or second stage of a limiting amplifier. A limiting amplifier is an amplifier that has a very high gain, e.g., amplifying a very low signal such as 1-2 mV peak-to-peak signal, into a much larger signal, such as a 500 mV peak-to-peak signal. A limiting amplifier is known as a ‘limiting’ amplifier because of the occurrence of saturation at the output. With the very high gain, the input signal is boosted to a useable level, but the output may be clamped, or limited due to saturation.
The first or second stages of the limiting amplifier provide a buffer between the input signal and a peak detection circuit used to measure the input. Thus, conventional attempts at a peak detection circuit of an input of a limiting amplifier used at extremely high data rates such as OC192 or OC48 measure the input signal at a node down the signal stream, i.e., after at least one or more stages of gain have occurred. This is shown in FIG. 6. For example if a peak detector has a dynamic range of 1 volt and a voltage gain of 10 precedes the peak detector, the input dynamic range is only 0.1 volt.
The present inventor has appreciated that measurement of an input signal at a node down the signal stream limits the dynamic range of the peak detector, resulting in a smaller dynamic range than the actual range of the input signal.
There is a need for a peak detection architecture and method having a larger dynamic range, for use at extremely high data rates, such as OC48, OC192 and above.